A/D Converter Mode Register 0 (Adm0) - Renesas RL78/G1P Hardware User Manual

RL78/G1P

9.3.2 A/D converter mode register 0 (ADM0)

This register sets the conversion time for analog input to be A/D converted, and starts/stops conversion.
The ADM0 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Address: FFF30H After reset: 00H
Symbol <7>
ADM1 ADCS
ADCS
0
1
ADMD
0
1
ADCE
0
1
For details of the FR2 to FR0, LV0 bits, and A/D conversion, see Table 9-3 A/D Conversion Time
Notes 1.
Selection.
While in the software trigger mode or hardware trigger no-wait mode, the operation of the A/D voltage
2.
comparator is controlled by the ADCS and ADCE bits, and it takes stabilization wait status from the start
of operation for the operation to stabilize. Therefore, when the ADCS bit is set to 1 after stabilization wait
status or more has elapsed from the time ADCE bit is set to 1, the conversion result at that time has
priority over the first conversion result. If the ADCS bit was set to 1 before the stabilization time elapsed,
ignore the first conversion data.
[Stabilization wait status]
If a high-accuracy channel is selected as the analog input channel:
If a test mode setting (ADTES1 bit of ADTES register = 1) is selected: 0.5
If a standard channel is selected as the analog input channel:
If a temperature sensor output/internal reference voltage output are selected as the analog input channel:
(ADISS bit of ADS register = 1):
Cautions 1. Change the ADMD, FR2 to FR0, and LV0 bits while in the conversion stopped status (ADCS = 0,
ADCE = 0).
2. Setting ADCS = 1, ADCE = 0 is prohibited.
3. Do not change the ADCE and ADCS bits from 0 to 1 at the same time by using an 8-bit
manipulation instruction. Be sure to set these bits in the order described in 9.7 A/D Converter
Setup Flowchart.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Figure 9-3. Format of A/D Converter Mode Register 0 (ADM0)
R/W
6 5
ADMD FR2 Note 1
Stops conversion operation
[When read]
Conversion stopped/standby status
Enables conversion operation
[When read]
While in the software trigger mode: Conversion operation status
While in the hardware trigger wait mode: A/D power supply stabilization wait status +
Specification of the A/D conversion channel selection mode
Select mode
Scan mode
Stops A/D voltage comparator operation
Enables A/D voltage comparator operation
4 3
FR1 Note 1 FR0 Note 1
A/D conversion operation control
conversion operation status
A/D voltage comparator operation control
CHAPTER 9 A/D CONVERTER
2 1
0 LV0 Note 1
Note 2

0.5 s

s

2 s

2 s
<0>
ADCE
248