Renesas RL78/G1P Hardware User Manual page 9

4.4 Port Function Operations ............................................................................................................ 90
4.4.1 Writing to I/O port ............................................................................................................................. 90
4.4.2 Reading from I/O port ....................................................................................................................... 90
4.4.3 Operations on I/O port ...................................................................................................................... 90
4.5 Settings of Port Related Register When Using Alternate Function ........................................ 91
4.6 Cautions When Using Port Function .......................................................................................... 94
4.6.1 Cautions on 1-bit manipulation instruction for port register n (Pn) .................................................... 94
4.6.2 Cautions on specifying the pin settings ............................................................................................ 95
CHAPTER 5 CLOCK GENERATOR ...................................................................................................... 96
5.1 Functions of Clock Generator ..................................................................................................... 96
5.2 Configuration of Clock Generator .............................................................................................. 97
5.3 Registers Controlling Clock Generator ...................................................................................... 99
5.3.1 Clock operation mode control register (CMC) .................................................................................. 99
5.3.2 System clock control register (CKC) ............................................................................................... 101
5.3.3 Clock operation status control register (CSC) ................................................................................ 102
5.3.4 Oscillation stabilization time counter status register (OSTC) .......................................................... 103
5.3.5 Oscillation stabilization time select register (OSTS) ....................................................................... 105
5.3.6 Peripheral enable registers 0, 1 (PER0, PER1) .............................................................................. 107
5.3.7 High-speed on-chip oscillator frequency select register (HOCODIV) ............................................. 109
5.3.8 High-speed on-chip oscillator trimming register (HIOTRM) ............................................................ 110
5.4 System Clock Oscillator ............................................................................................................ 111
5.4.1 X1 oscillator .................................................................................................................................... 111
5.4.2 High-speed on-chip oscillator ......................................................................................................... 114
5.4.3 Low-speed on-chip oscillator .......................................................................................................... 114
5.5 Clock Generator Operation ....................................................................................................... 115
5.6 Controlling Clock ........................................................................................................................ 117
5.6.1 Example of setting high-speed on-chip oscillator ........................................................................... 117
5.6.2 Example of setting X1 oscillation clock ........................................................................................... 118
5.6.3 CPU clock status transition diagram ............................................................................................... 119
5.6.4 Condition before changing CPU clock and processing after changing CPU clock ......................... 123
5.6.5 Time required for switchover of CPU clock and system clock ........................................................ 124
5.6.6 Preconditions for stopping clock oscillation .................................................................................... 124
5.7 Resonator and Oscillator Constants ......................................................................................... 125
CHAPTER 6 TIMER ARRAY UNIT ...................................................................................................... 126
6.1 Functions of Timer Array Unit ................................................................................................... 128
6.1.1 Independent channel operation function ........................................................................................ 128
6.1.2 Simultaneous channel operation function ....................................................................................... 129
6.1.3 8-bit timer operation function (channels 1 and 3 only) .................................................................... 130
6.2 Configuration of Timer Array Unit ............................................................................................ 131
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