Renesas RL78/G1P Hardware User Manual page 15

12.5.14 Communication reservation ........................................................................................................ 501
12.5.15 Cautions ..................................................................................................................................... 505
12.5.16 Communication operations ......................................................................................................... 506
12.5.17 Timing of I
12.6 Timing Charts ........................................................................................................................... 534
CHAPTER 13 DMA CONTROLLER ..................................................................................................... 549
13.1 Functions of DMA Controller .................................................................................................. 549
13.2 Configuration of DMA Controller ............................................................................................ 550
13.2.1 DMA SFR address register n (DSAn) ........................................................................................... 550
13.2.2 DMA RAM address register n (DRAn) .......................................................................................... 551
13.2.3 DMA byte count register n (DBCn) ............................................................................................... 552
13.3 Registers Controlling DMA Controller ................................................................................... 553
13.3.1 DMA mode control register n (DMCn) .......................................................................................... 554
13.3.2 DMA operation control register n (DRCn) ..................................................................................... 556
13.4 Operation of DMA Controller ................................................................................................... 557
13.4.1 Operation procedure .................................................................................................................... 557
13.4.2 Transfer mode .............................................................................................................................. 558
13.4.3 Termination of DMA transfer ........................................................................................................ 558
13.5 Example of Setting of DMA Controller ................................................................................... 559
13.5.1 CSI consecutive transmission ...................................................................................................... 559
13.5.2 Consecutive capturing of A/D conversion results ......................................................................... 561
13.5.3 UART consecutive reception + ACK transmission........................................................................ 563
13.5.4 Holding DMA transfer pending by DWAITn bit ............................................................................. 565
13.5.5 Forced termination by software .................................................................................................... 566
13.6 Cautions on Using DMA Controller ........................................................................................ 568
CHAPTER 14 EVENT LINK CONTROLLER (ELC) ........................................................................... 570
14.1 Functions of ELC ...................................................................................................................... 570
14.2 Configuration of ELC ............................................................................................................... 570
14.3 Registers Controlling ELC ....................................................................................................... 571
14.3.1 Event output destination select register n (ELSELRn) (n = 00 to 09) ........................................... 571
14.4 Operation ................................................................................................................................... 573
CHAPTER 15 INTERRUPT FUNCTIONS ............................................................................................. 574
15.1 Interrupt Function Types ......................................................................................................... 574
15.2 Interrupt Sources and Configuration ..................................................................................... 574
15.3 Registers Controlling Interrupt Functions ............................................................................. 578
15.3.1 Interrupt request flag registers (IF0L, IF0H, IF1L) ........................................................................ 579
15.3.2 Interrupt mask flag registers (MK0L, MK0H, MK1L) ..................................................................... 580
2
C interrupt request (INTIICAn) occurrence ............................................................... 513
Index-9