Renesas RL78/G1P Hardware User Manual page 413

RL78/G1P
(2) SNOOZE mode operation (continuous startup)
Figure 11-72. Timing Chart of SNOOZE Mode Operation (Continuous Startup) (Type 1: DAPmn = 0, CKPmn = 0)
CPU operation status
Normal operation STOP mode
SS00
ST00 <1>
SE00
SWC0
SSEC0 L
Clock request signal
(internal signal)
SDR00
SCK00 pin
SI00 pin
Shift register 00
INTCSI00
TSF00
Note Only read received data while SWCm = 1 and before the next edge of the SCKp pin input is detected.
Cautions 1. Before switching to the SNOOZE mode or after reception operation in the SNOOZE mode finishes,
set the STm0 bit to 1 (clear the SEm0 bit, and stop the operation).
And after completion the receive operation, also clearing SWCm bit to 0 (SNOOZE release).
2. When SWCm = 1, the BFFm1 and OVFm1 flags will not change.
Remarks 1. <1> to <10> in the figure correspond to <1> to <10> in Figure 11-73 Flowchart of SNOOZE Mode
Operation (Continuous Startup).
2. m = 0; p = 00
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
SNOOZE mode
<4>
<3>
Receive data 1
Reception & shift operation
Data reception
<2>
<5><6>
CHAPTER 11 SERIAL ARRAY UNIT
Normal operation STOP mode
<4>
<3>
<9>
<10>
Receive data 1
Note
Read
<8>
<2>
<5><6>
<7>
SNOOZE mode
Receive data 2
Receive data 2
Reception & shift operation
Data reception
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