Renesas RL78/G1P Hardware User Manual page 665

RL78/G1P
20.3.3 Operation flow
Figure 20-3 shows the flowchart of flash memory CRC operation function (high-speed CRC).
Figure 20-3. Flowchart of Flash Memory CRC Operation Function (High-speed CRC)
Copied to RAM to HALT instruction
Execute the HALT instruction
Execute the RET instruction
Read the value of PGCRCL
Cautions 1. The CRC operation is executed only on the code flash.
2. Store the expected CRC operation value in the area below the operation range in the code flash.
3. The CRC operation is enabled by executing the HALT instruction in the RAM area.
Be sure to execute the HALT instruction in RAM area.
The expected CRC operation value can be calculated by using the integrated development environment.
CubeSuite+ development environment. Refer to the CubeSuite+ integrated development environment user's manual for
details.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Start
Set FEA5 to FEA0 bits
and RET instruction,
initialize 10 bytes
All xxMKx = 1
CRC0EN = 1
PGCRCL = 0000H
CALL instruction
CRC operation complete
Yes
CRC0EN = 0
Compare the value with
the expected CRC value
Match
Correctly complete
CHAPTER 20 SAFETY FUNCTIONS
; Store the expected CRC operation result
; value in the lowest 4 bytes.
; CRC operation range setting
; Copy the HALT and RET instructions to be
; executed on the RAM to the RAM.
; Initialize the 10 bytes after the RET
; instruction.
; Masks all interrupt
; Enables CRC operation
; Initialize the CRC operation result register
; Call the address of the HALT instruction
; copied to the RAM.
; CRC operation starts by HALT instruction
; execution
No
; When the CRC operation is complete, the HALT
; mode is released and control is returned from RAM
; Prohibits CRC operation
; Read CRC operation result
; Compare the value with the stored expected
; value.
Not match
Abnormal complete
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