Renesas RL78/G1P Hardware User Manual page 51

RL78/G1P
 Processor mode control register (PMC)
This register sets the flash memory space for mirroring to area from F2000H to F3FFFH.
The PMC register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Address: FFFFEH After reset: 00H R/W
Symbol
PMC
Cautions 1. Be sure to clear bit 0 (MAA) of this register to 0 (default value).
2. After setting the PMC register, wait for at least one instruction and access the mirror area.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Figure 3-2. Format of Processor Mode Control Register (PMC)
7 6 5
0 0 0
MAA Selection of flash memory space for mirroring to area from F2000H to F3FFFH
0 02000H to 03FFFH is mirrored to F2000H to F3FFFH
1 Setting prohibited
CHAPTER 3 CPU ARCHITECTURE
4 3 2
0 0 0
1 <0>
0 MAA
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