Renesas RL78/G1P Hardware User Manual page 730

RL78/G1P
Instruction Mnemonic
Group
16-bit ADDW AX, #word
operation
AX, AX
AX, BC
AX, DE
AX, HL
AX, !addr16
AX, ES:!addr16
AX, saddrp
AX, [HL+byte]
AX, ES: [HL+byte]
SUBW AX, #word
AX, BC
AX, DE
AX, HL
AX, !addr16
AX, ES:!addr16
AX, saddrp
AX, [HL+byte]
AX, ES: [HL+byte]
CMPW AX, #word
AX, BC
AX, DE
AX, HL
AX, !addr16
AX, ES:!addr16
AX, saddrp
AX, [HL+byte]
AX, ES: [HL+byte]
Notes 1. Number of CPU clocks (f
when no data is accessed.
2. Number of CPU clocks (f
Remark Number of clock is when program exists in the internal ROM (flash memory) area. If fetching the instruction
from the internal RAM area, the number becomes double number plus 3 clocks at a maximum.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Table 26-5. Operation List (11/18)
Operands Bytes
Note 1 Note 2
3
1
1
1
1
3
4
2
3
4
3
1
1
1
3
4
2
3
4
3
1
1
1
3
4
2
3
4
) when the internal RAM area, SFR area, or extended SFR area is accessed, or
CLK
) when the program memory area is accessed.
CLK
Clocks
 AX, CY  AX+word
1
 AX, CY  AX+AX
1
 AX, CY  AX+BC
1
 AX, CY  AX+DE
1
 AX, CY  AX+HL
1
AX, CY  AX+(addr16)
1 4
AX, CY  AX+(ES:addr16)
2 5
 AX, CY  AX+(saddrp)
1
AX, CY  AX+(HL+byte)
1 4
AX, CY  AX+((ES:HL)+byte)
2 5
 AX, CY  AX – word
1
 AX, CY  AX – BC
1
 AX, CY  AX – DE
1
 AX, CY  AX – HL
1
AX, CY  AX – (addr16)
1 4
AX, CY  AX – (ES:addr16)
2 5
 AX, CY  AX – (saddrp)
1
AX, CY  AX – (HL+byte)
1 4
AX, CY  AX – ((ES:HL)+byte)
2 5

1 AX – word

1 AX – BC

1 AX – DE

1 AX – HL
1 4 AX – (addr16)
2 5 AX – (ES:addr16)

1 AX – (saddrp)
1 4 AX – (HL+byte)
2 5 AX – ((ES:HL)+byte)
CHAPTER 26 INSTRUCTION SET
Operation Flag
Z AC CY
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
× × ×
711