Renesas RL78/G1P Hardware User Manual page 613

RL78/G1P
16.2.1 Oscillation stabilization time counter status register (OSTC)
This is the register that indicates the count status of the X1 clock oscillation stabilization time counter.
The X1 clock oscillation stabilization time can be checked in the following case.
 If the X1 clock starts oscillation while the high-speed on-chip oscillator clock is being used as the CPU clock.
 If the STOP mode is entered and then released while the high-speed on-chip oscillator clock is being used as the
CPU clock with the X1 clock oscillating.
The OSTC register can be read by a 1-bit or 8-bit memory manipulation instruction.
When reset is released (reset by RESET input, POR, LVD, WDT, and executing an illegal instruction), the STOP
instruction and MSTOP bit (bit 7 of clock operation status control register (CSC)) = 1 clear this register to 00H.
Figure 16-1. Format of Oscillation Stabilization Time Counter Status Register (OSTC)
Address: FFFA2H
Symbol 7
OSTC MOST
8
MOST
8
0
1
1
1
1
1
1
1
1
Cautions 1. After the above time has elapsed, the bits are set to 1 in order from the MOST8 bit and remain 1.
2. The oscillation stabilization time counter counts up to the oscillation stabilization time set by
the oscillation stabilization time select register (OSTS). If the STOP mode is entered and then
released while the high-speed on-chip oscillator clock is being used as the CPU clock, set the
oscillation stabilization time as follows.
 Desired OSTC register oscillation stabilization time  Oscillation stabilization time set by
OSTS register
Note, therefore, that only the status up to the oscillation stabilization time set by the OSTS
register is set to the OSTC register after STOP mode is released.
3. The X1 clock oscillation stabilization wait time does not include the time until clock oscillation
starts ("a" below).
Remark f : X1 clock oscillation frequency
X
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
After reset: 00H R
6 5 4 3
MOST MOST MOST MOST
9 10 11 13
MOST MOST MOST MOST
9 10 11 13
0 0 0 0
0 0 0 0
1 0 0 0
1 1 0 0
1 1 1 0
1 1 1 1
1 1 1 1
1 1 1 1
1 1 1 1
STOP mode release
X1 pin voltage
waveform
CHAPTER 16 STANDBY FUNCTION
2 1 0
MOST MOST MOST
15 17 18
MOST MOST MOST Oscillation stabilization time status
15 17 18
8
0 0 0 2 /f
X
8
0 0 0 2 /f
X
9
0 0 0 2 /f
X
10
0 0 0 2 /f
11
0 0 0 2 /f
13
0 0 0 2 /f
15
1 0 0 2 /f
17
1 1 0 2 /f
18
1 1 1 2 /f
a
f = 10 MHz f = 20 MHz
X X
 
max. 25.6 s max. 12.8
 
min. 25.6 s min. 12.8
 
min. 51.2 s min. 25.6
 
min. 102 s min. 51.2
X
 
min. 204 s min. 102 s min.
X
 
min. 819 s min. 409 s min.
X
min. 3.27 ms min. 1.63 ms min.
X
min. 13.1 ms min. 6.55 ms min.
X
min. 26.2 ms min. 13.1 ms min.
X
s max.
s min.
s min.
s min.
594