Renesas RL78/G1P Hardware User Manual page 55

RL78/G1P
(d) Auxiliary carry flag (AC)
If the operation result has a carry from bit 3 or a borrow at bit 3, this flag is set (1). It is reset (0) in all other cases.
(e) In-service priority flags (ISP1, ISP0)
This flag manages the priority of acknowledgeable maskable vectored interrupts. Vectored interrupt requests
specified lower than the value of ISP0 and ISP1 flags by the priority specification flag registers (PRn0L, PRn0H,
PRn1L) (see 15.3.3) cannot be acknowledged. Actual vectored interrupt request acknowledgment is controlled
by the interrupt enable flag (IE).
Remark n = 0, 1
(f) Carry flag (CY)
This flag stores overflow and underflow upon add/subtract instruction execution. It stores the shift-out value upon
rotate instruction execution and functions as a bit accumulator during bit operation instruction execution.
(3) Stack pointer (SP)
This is a 16-bit register to hold the start address of the memory stack area. Only the internal RAM area can be set as
the stack area.
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SP SP15 SP14 SP13 SP12 SP11 SP10 SP9 SP8 SP7 SP6 SP5 SP4 SP3 SP2 SP1
In stack addressing through a stack pointer, the SP is decremented ahead of write (save) to the stack memory and is
incremented after read (restore) from the stack memory.
Cautions 1. Since reset signal generation makes the SP contents undefined, be sure to initialize the SP
before using the stack.
2. It is prohibited to use the general-purpose register space (FFEE0H to FFEFFH) for fetching
instructions or as a stack area.
3. When self-programming is performed or the data flash memory is rewritten, the stack used for
each library and the RAM address used for the data buffer and DMA transfer should not be set to
the RAM area of the following products.
Programming Library Type 01 User's Manual and RL78 Family Data Flash Library Type 04 User's
Manual.
RL78/G1P: FFE20H to FFEFFH
4. The flash libraries use the parts of the RAM area referred to as self RAM in self-programming or
rewriting of the data flash memory. For the sizes of the RAM areas used by the flash libraries,
see "ROM, RAM capacities" in 1.1 Features.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Figure 3-6. Format of Stack Pointer
CHAPTER 3 CPU ARCHITECTURE
For details, refer to RL78 Family Flash Self-
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