Renesas RL78/G1P Hardware User Manual page 736

16-bit single-chip microcontroller
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RL78/G1P
Instruction
Mnemonic
Group
Stack
PUSH
PSW
manipulate
rp
POP
PSW
rp
MOVW
SP, #word
SP, AX
AX, SP
HL, SP
BC, SP
DE, SP
ADDW
SP, #byte
SUBW
SP, #byte
Un-
BR
AX
conditional
$addr20
branch
$!addr20
!addr16
!!addr20
Conditional
BC
$addr20
branch
BNC
$addr20
BZ
$addr20
BNZ
$addr20
BH
$addr20
BNH
$addr20
BT
saddr.bit, $addr20
sfr.bit, $addr20
A.bit, $addr20
PSW.bit, $addr20
[HL].bit, $addr20
ES:[HL].bit,
$addr20
Notes 1.
Number of CPU clocks (f
when no data is accessed.
2.
Number of CPU clocks (f
3.
This indicates the number of clocks "when condition is not met/when condition is met".
Remark
Number of clock is when program exists in the internal ROM (flash memory) area. If fetching the instruction
from the internal RAM area, the number becomes double number plus 3 clocks at a maximum.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Table 26-5. Operation List (17/18)
Operands
Bytes
Note 1 Note 2
2
1
2
1
4
2
2
3
3
3
2
2
2
2
3
3
4
2
2/4
2
2/4
2
2/4
2
2/4
3
2/4
3
2/4
4
3/5
4
3/5
3
3/5
4
3/5
3
3/5
4
4/6
) when the internal RAM area, SFR area, or extended SFR area is accessed, or
CLK
) when the program memory area is accessed.
CLK
Clocks
(SP  1)  PSW, (SP  2)  00H,
1
SP  SP2
(SP  1)  rp
1
SP  SP – 2
PSW  (SP+1), SP  SP + 2
3
(SP), rp
1
rp
L
SP  word
1
SP  AX
1
AX  SP
1
HL  SP
1
BC  SP
1
DE  SP
1
SP  SP + byte
1
SP  SP  byte
1
PC  CS, AX
3
PC  PC + 2 + jdisp8
3
PC  PC + 3 + jdisp16
3
PC  0000, addr16
3
PC  addr20
3
PC  PC + 2 + jdisp8 if CY = 1
Note 3
PC  PC + 2 + jdisp8 if CY = 0
Note 3
PC  PC + 2 + jdisp8 if Z = 1
Note 3
PC  PC + 2 + jdisp8 if Z = 0
Note 3
PC  PC + 3 + jdisp8 if (ZCY)=0
Note 3
PC  PC + 3 + jdisp8 if (ZCY)=1
Note 3
PC  PC + 4 + jdisp8 if (saddr).bit = 1
Note 3
PC  PC + 4 + jdisp8 if sfr.bit = 1
Note 3
PC  PC + 3 + jdisp8 if A.bit = 1
Note 3
PC  PC + 4 + jdisp8 if PSW.bit = 1
Note 3
PC  PC + 3 + jdisp8 if (HL).bit = 1
Note 3
6/7
PC  PC + 4 + jdisp8 if (ES, HL).bit = 1
Note 3
7/8
CHAPTER 26 INSTRUCTION SET
Operation
, (SP  2)  rp
,
H
L
 (SP+1), SP  SP + 2
H
Flag
Z
AC CY
R
R
R
717

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