Renesas RL78/G1P Hardware User Manual page 625

RL78/G1P
SNOOZE Mode Setting
Item
System clock
Main system clock f
IH
f
X
f
EX
f
IL
CPU
Code flash memory
Data flash memory
RAM
Port (latch)
Timer array unit
Watchdog timer
Clock output/buzzer output
A/D converter
D/A converter
Serial array unit (SAU)
Serial interface (IICA)
DMA controller
Event link controller (ELC)
Power-on-reset function
Voltage detection function
External interrupt
CRC operation function
RAM parity error detection function
RAM guard function
SFR guard function
Illegal-memory access
detection function
Remarks 1. Operation stopped: Operation is automatically stopped before switching to the SNOOZE mode.
Operation disabled: Operation is stopped before switching to the SNOOZE mode.
f : High-speed on-chip oscillator clock
IH
f : X1 clock
X
2. p = 00; q = 0
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Table 16-3. Operating Statuses in SNOOZE Mode
When Inputting CSIp/UARTq Data Reception Signal or A/D Converter Timer Trigger Signal
When CPU Is Operating on High-speed On-chip Oscillator Clock (f
Clock supply to the CPU is stopped
Operation started
Stopped
Set by bits 0 (WDSTBYON) and 4 (WDTON) of option byte (000C0H)
Operation stopped
Use of the status while in the STOP mode continues
Operation disabled
See CHAPTER 8 WATCHDOG TIMER
Operation stopped
Operable
Operable (status before SNOOZE mode was set is retained)
Operable only CSIp and UARTq. Operation disabled other than CSIp and UARTq.
Operation disabled
Operable function blocks can be linked
Operable
Operation disabled
f
f
CHAPTER 16 STANDBY FUNCTION
While in STOP Mode
: Low-speed on-chip oscillator clock
IL
: External main system clock
EX
)
IH
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