Renesas RL78/G1P Hardware User Manual page 164

16-bit single-chip microcontroller

Hide thumbs Also See for RL78/G1P:

Table of Contents

Address: F0190H, F0191H (TMR00) to F0196H, F0197H (TMR03)

If both the edges are specified when the value of the STSmn2 to STSmn0 bits is other than 010B, set the CISmn1

to CISmn0 bits to 10B.

Other than above

The operation of each mode varies depending on MDmn0 bit (see next table).

Bit 11 is a read-only bit and fixed to 0. Writing to this bit is ignored.

Remark m: Unit number (m = 0), n: Channel number (n = 0 to 3)

R01UH0895EJ0100 Rev.1.00

Nov 29, 2019

Figure 6-11. Format of Timer Mode Register mn (TMRmn) (3/4)

Falling edge

Both edges (when low-level width is measured)

Start trigger: Falling edge, Capture trigger: Rising edge

Both edges (when high-level width is measured)

Start trigger: Rising edge, Capture trigger: Falling edge

Operation mode of channel n

Interval timer mode

Capture mode

Event counter mode

One-count mode

Capture & one-count mode

Setting prohibited

After reset: 0000H

Selection of TImn pin input valid edge

Corresponding function

Interval timer/Square wave

output/PWM output (master)

Input pulse interval

External event counter

Delay counter/One-shot pulse

output/PWM output (slave)

Measurement of high-/low-level

width of input signal

CHAPTER 6 TIMER ARRAY UNIT

Count operation of

Counting down

Counting down