Renesas RL78/G1P Hardware User Manual page 77

RL78/G1P
ES: word [BC]
<1> <2>
Instruction code
OP-code
Low Addr.
<2>
High Addr.
The ES register <1> specifies a 64-Kbyte area within the
overall 1-Mbyte space as the four higher-order bits, X, of
the address range.
"word" <2> specifies the address where the target array of
word-sized data starts in the 64 KB area specified in the
ES register <1>.
A pair of registers <3> specifies an offset within the array to
the target location in memory.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Figure 3-29. Example of ES:word[BC]
<3>
<3>
rp(BC)
<2>
Address of a word within an array
X0000H
<1> <1>
ES
CHAPTER 3 CPU ARCHITECTURE
Target memory
<3>
Offset
Specifies a
64 KB area
Memory
XFFFFH
Array of
word-sized
data
X0000H
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