Timer Count Register Mn (Tcrmn) - Renesas RL78/G1P Hardware User Manual

16-bit single-chip microcontroller
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RL78/G1P

6.2.1 Timer count register mn (TCRmn)

The TCRmn register is a 16-bit read-only register and is used to count clocks.
The value of this counter is incremented or decremented in synchronization with the rising edge of a count clock.
Whether the counter is incremented or decremented depends on the operation mode that is selected by the MDmn3 to
MDmn0 bits of timer mode register mn (TMRmn) (see 6.3.3 Timer mode register mn (TMRmn)).
Address: F0180H, F0181H (TCR00) to F0186H, F0187H (TCR03)
15
TCRmn
m: Unit number (m = 0), n: Channel number (n = 0 to 3)
Remark
The count value is set to FFFFH in the following cases.
 When the reset signal is generated
 When the TAUmEN bit of peripheral enable register 0 (PER0) is cleared
 When counting of the slave channel has been completed in the PWM output mode
 When counting of the slave channel has been completed in the delay count mode
 When counting of the master/slave channel has been completed in the one-shot pulse output mode
 When counting of the slave channel has been completed in the multiple PWM output mode
The count value is cleared to 0000H in the following cases.
 When the start trigger is input in the capture mode
 When capturing has been completed in the capture mode
Caution The count value is not captured to timer data register mn (TDRmn) even when the TCRmn
register is read.
The TCRmn register read value differs as follows according to operation mode changes and the operating status.
Table 6-2. Timer Count Register mn (TCRmn) Read Value in Various Operation Modes
Operation Mode
Count Mode
Interval timer mode
Count down
Capture mode
Count up
Event counter mode
Count down
One-count mode
Count down
Capture & one-count
Count up
mode
Note This indicates the value read from the TCRmn register when channel n has stopped operating as a timer (TEmn =
0) and has been enabled to operate as a counter (TSmn = 1). The read value is held in the TCRmn register until
the count operation starts.
m: Unit number (m = 0), n: Channel number (n = 0 to 3)
Remark
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Figure 6-6. Format of Timer Count Register mn (TCRmn)
F0181H (TCR00)
14
13
12
11
10
Value if the
operation mode
was changed
after releasing
reset
FFFFH
0000H
FFFFH
FFFFH
0000H
After reset: FFFFH
9
8
7
6
5
Timer Count Register mn (TCRmn) Read Value
Value if the Operation
Value if the operation
was restarted after
mode was changed
count operation
after count operation
paused (TTmn = 1)
paused (TTmn = 1)
Value if stop
Value if stop
Value if stop
Value if stop
Value if stop
CHAPTER 6 TIMER ARRAY UNIT
R
F0180H (TCR00)
4
3
2
1
Note
Value when waiting
for a start trigger
after one count
Undefined
Undefined
Undefined
Undefined
Undefined
Capture value of
TDRmn register + 1
0
FFFFH
135

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