Renesas RL78/G1P Hardware User Manual page 712

RL78/G1P
Figure 24-2. Memory Spaces Where Debug Monitor Programs Are Allocated
Code flash memory
Note 1
0 1 0 0 0 H
0 0 0 D 8 H
Debug monitor area
0 0 0 C E H
0 0 0 C 4 H
0 0 0 C 3 H
Debug monitor area
0 0 0 0 2 H
0 0 0 0 0 H
Notes 1. Address of code flash memory is as follows.
RL78/G1P
2. When real-time RAM monitor (RRM) function and dynamic memory modification (DMM) function are not
used, it is 256 bytes.
3. In debugging, reset vector is rewritten to address allocated to a monitor program.
4. Since this area is allocated immediately before the stack area, the address of this area varies depending on
the stack increase and decrease.
When using self-programming, 12 extra bytes are consumed for the stack area used.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Use prohibited
(512 bytes or
Note 2
256 bytes )
Code flash
area
(10 bytes)
Security ID area
(10 bytes)
(2 bytes)
Note 3
Products
CHAPTER 24 ON-CHIP DEBUG FUNCTION
On-chip debug
option byte area
(1 byte)
That is, 4 extra bytes are consumed for the stack area used.
Internal RAM
SFR area
Stack area for debugging
Internal RAM
Note 4
(4 bytes)
Mirror area
: Area used for on-chip debugging
Address of Note 1
03FFFH
area
693