Renesas RL78/G1P Hardware User Manual page 505

RL78/G1P
Caution Note the minimum f
operation frequency for serial interface IICA is determined according to the mode.
Fast mode:
Fast mode plus: f
Normal mode:
In addition, the fastest operation frequency of the operation clock of the serial interface IICA is 20
MHz (Max.). If the f
register to 1.
Remarks 1. Calculate the rise time (t
they differ depending on the pull-up resistance and wire load.
2. IICWLn:
IICWHn:
t :
F
t :
R
f :
CLK
3. n = 0, 1
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
operation frequency when setting the transfer clock. The minimum f
CLK
f = 3.5 MHz (MIN.)
CLK
= 10 MHz (MIN.)
CLK
f = 1 MHz (MIN.)
CLK
exceeds 20 MHz, set the clock to f
CLK
) and fall time (t
R
IICA low-level width setting register n
IICA high-level width setting register n
SDAAn and SCLAn signal falling times
SDAAn and SCLAn signal rising times
CPU/peripheral hardware clock frequency
CHAPTER 12 SERIAL INTERFACE IICA
/2 by setting the PRSn bit of IICCTLn1
CLK
) of the SDAAn and SCLAn signals separately, because
F
CLK
486