Renesas RL78/G1P Hardware User Manual page 119

RL78/G1P
Figure 5-2. Format of Clock Operation Mode Control Register (CMC)
Address: FFFA0H
Symbol 7
CMC EXCLK
EXCLK
0
0
1
1
AMPH
0
1
Cautions 1. The CMC register can be written only once after reset release, by an 8-bit memory
Remark f
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
After reset: 00H R/W
6 5
OSCSEL 0
OSCSEL High-speed system clock
pin operation mode
0 Input port mode
1 X1 oscillation mode
0 Input port mode
1 External clock input mode
1 MHz  f  10 MHz
X
 20 MHz
10 MHz < f
X
manipulation instruction. When using the CMC register with its initial value (00H), be
sure to set the register to 00H after a reset ends in order to prevent malfunction due
to a program loop. Such a malfunction becomes unrecoverable when a value other
than 00H is mistakenly written..
2. After reset release, set the CMC register before X1 oscillation is started as set by the
clock operation status control register (CSC).
3. Specify the settings for the AMPH bit while f
(before f is switched to f
CLK
4. Although the maximum system clock frequency is 32 MHz, the maximum frequency
of the X1 oscillator is 20 MHz.
: X1 clock frequency
X
CHAPTER 5 CLOCK GENERATOR
4 3
0 0
X1/P121 pin
Input port
Crystal/ceramic resonator connection
Input port
Input port
Control of X1 clock oscillation frequency
IH
).
MX
2 1
0 0 AMPH
X2/EXCLK/P122 pin
External clock input
is selected as f after a reset ends
CLK
0
100