Renesas RL78/G1P Hardware User Manual page 310

RL78/G1P
(2) If no interrupt is generated after A/D conversion ends
If the A/D conversion result value is outside the range of values specified by the A/D conversion result comparison
function (which is set up by using the ADRCK bit and ADUL/ADLL register), the A/D conversion end interrupt request
signal (INTAD) is not generated.
 While in the select mode
If the A/D conversion end interrupt request signal (INTAD) is not generated after A/D conversion ends, the clock
request signal (an internal signal) is automatically set to the low level, and supplying the high-speed on-chip
oscillator clock stops. If a hardware trigger is input later, A/D conversion work is again performed in the SNOOZE
mode.
 While in the scan mode
If the A/D conversion end interrupt request signal (INTAD) is not generated even once during A/D conversion of the
four channels, the clock request signal (an internal signal) is automatically set to the low level after A/D conversion
of the four channels ends, and supplying the high-speed on-chip oscillator clock stops. If a hardware trigger is input
later, A/D conversion work is again performed in the SNOOZE mode.
Figure 9-36. Operation Example When No Interrupt Is Generated After A/D Conversion Ends (While in Scan Mode)
Hardware
trigger input
Clock request signal
(internal signal)
ADCS
Conversion
channels
Interrupt signal
(INTAD)
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Channel 1 Channel 2 Channel 3
No interrupt is generated when
conversion ends for any channel.
CHAPTER 9 A/D CONVERTER
The clock request signal
is set to the low level.
Channel 4
291