Renesas RL78/G1P Hardware User Manual page 502

RL78/G1P
12.3.8 Port mode register 6 (PM6)
This register sets the input/output of port 6 in 1-bit units.
When using the P60/SCLA0/SCLA1 pin as clock I/O and the P61/SDAA0/SDAA1 pin as serial data I/O, clear PM60 and
PM61 to 0, and set the output latches of P60 and P61 to 1.
Set the IICEn bit (bit 7 of IICA control register n0 (IICCTLn0)) to 1 before setting the output mode because the
P60/SCLA0/SCLA1 and P61/SDAA0/SDAA1 pins output a low level (fixed) when the IICEn bit is 0.
The PM6 register can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to FFH.
Address: FFF26H
Symbol
PM6
PM6n
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Figure 12-12. Format of Port Mode Register 6 (PM6)
After reset: FFH R/W
7 6 5
1 1 1
0 Output mode (output buffer on)
1 Input mode (output buffer off)
CHAPTER 12 SERIAL INTERFACE IICA
4 3
1 1
P6n pin I/O mode selection (n = 0, 1)
2 1 0
1 PM61 PM60
483