Renesas RL78/G1P Hardware User Manual page 163

16-bit single-chip microcontroller

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Address: F0190H, F0191H (TMR00) to F0196H, F0197H (TMR03)

(Bit 11 of TMRmn (n = 2))

Operates in independent channel operation function or as slave channel in simultaneous channel operation

Operates as master channel in simultaneous channel operation function.

Only channel 2 can be set as a master channel (MASTERmn = 1).

Channel 0 is fixed to 0 (channel 0 always operates as master regardless of the bit setting, because it is the highest

Clear the MASTERmn bit to 0 for a channel that is used with the independent channel operation function.

(Bit 11 of TMRmn (n = 1, 3))

Operates as 16-bit timer.

(Operates in independent channel operation function or as slave channel in simultaneous channel operation

Operates as 8-bit timer.

Other than above

Bit 11 is a read-only bit and fixed to 0. Writing to this bit is ignored.

Remark m: Unit number (m = 0), n: Channel number (n = 0 to 3)

R01UH0895EJ0100 Rev.1.00

Nov 29, 2019

Figure 6-11. Format of Timer Mode Register mn (TMRmn) (2/4)

Selection between using channel n independently or

simultaneously with another channel(as a slave or master)

Selection of 8 or 16-bit timer operation for channels 1 and 3

Setting of start trigger or capture trigger of channel n

Only software trigger start is valid (other trigger sources are unselected).

Valid edge of the TImn pin input is used as both the start trigger and capture trigger.

Both the edges of the TImn pin input are used as a start trigger and a capture trigger.

Interrupt signal of the master channel is used (when the channel is used as a slave channel

with the simultaneous channel operation function).

Setting prohibited

After reset: 0000H

CHAPTER 6 TIMER ARRAY UNIT