Renesas RL78/G1P Hardware User Manual page 141

RL78/G1P
Table 5-3. CPU Clock Transition and SFR Register Setting Examples (3/3)
(5)  HALT mode (D) set while CPU is operating with high-speed on-chip oscillator clock (B)
 HALT mode (E) set while CPU is operating with high-speed system clock (C)
Status Transition
(B)  (D)
(C)  (E)
 STOP mode (F) set while CPU is operating with high-speed on-chip oscillator clock (B)
(6)
 STOP mode (G) set while CPU is operating with high-speed system clock (C)
Status Transition
(B)  (F)
(C)  (G)
(7) CPU changing from STOP mode (F) to SNOOZE mode (H)
For details about the setting for switching from the STOP mode to the SNOOZE mode, see 9.8 SNOOZE Mode
Function, 11.5.7 SNOOZE mode function (CSI00) and 11.7.3 SNOOZE mode function.
Remark (A) to (H) in Table 5-3 correspond to (A) to (H) in Figure 5-14.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Executing HALT instruction
(Setting sequence)
Stopping peripheral
functions that cannot
operate in STOP mode
In X1 oscillation
External main
system clock
CHAPTER 5 CLOCK GENERATOR
Setting
Setting

Executing STOP
instruction
Sets the OSTS
register

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