Renesas RL78/G1P Hardware User Manual page 376

RL78/G1P
(4) Processing flow (in continuous reception mode)
Figure 11-38. Timing Chart of Master Reception (in Continuous Reception Mode) (Type 1: DAPmn = 0, CKPmn = 0)
<1>
SSmn
STmn
SEmn
SDRmn Dummy data
<2> Write
SCKp pin
SIp pin
Shift register mn
INTCSIp
MDmn0
TSFmn
BFFmn
<3>
Caution The MDmn0 bit can be rewritten even during operation.
However, rewrite it before receive of the last bit is started, so that it has been rewritten before the
transfer end interrupt of the last receive data.
Remarks 1. <1> to <8> in the figure correspond to <1> to <8> in Figure 11-39 Flowchart of Master Reception
(in Continuous Reception Mode).
2. m: Unit number (m = 0), n: Channel number (n = 0), p: CSI number (p = 00), mn = 00
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Dummy data
<2> Write
Receive data 1
Reception & shift operation
Data reception
<3>
CHAPTER 11 SERIAL ARRAY UNIT
Dummy data
Receive data 1
<2>
Write
Read
Receive data 2
Reception & shift operation
Data reception
<4>
Receive data 3
Receive data 2
Read
Receive data 3
Reception & shift operation
Data reception
<5>
<3> <4>
<8>
Read
<6> <7>
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