Renesas RL78/G1P Hardware User Manual page 340

16-bit single-chip microcontroller
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RL78/G1P
Figure 11-6. Format of Serial Communication Operation Setting Register mn (SCRmn) (2/2)
Address: F0118H, F0119H (SCR00), F011AH, F011BH (SCR01)
Symbol
15
14
SCRmn
TXE
RXE
mn
mn
PTC
PTC
mn1
mn0
0
0
0
1
1
0
1
1
Be sure to set PTCmn1, PTCmn0 = 0, 0 in the CSI mode.
DIR
mn
0
Inputs/outputs data with MSB first.
1
Inputs/outputs data with LSB first.
SLCm
SLC
Note 1
n1
mn0
0
0
0
1
1
0
1
1
When the transfer end interrupt is selected, the interrupt is generated when all stop bits have been completely
transferred.
Set 1 bit (SLCmn1, SLCmn0 = 0, 1) during UART reception.
Set no stop bit (SLCmn1, SLCmn0 = 0, 0) in the CSI mode.
Set 1 bit (SLCmn1, SLCmn0 = 0, 1) or 2 bits (SLCmn1, SLCmn0 = 1, 0) during UART transmission.
DLSm
DLS
Note 2
n1
mn0
0
1
1
0
1
1
Other than above Setting prohibited
Notes 1. The SCR00 register only.
2. 0 is always added regardless of the data contents.
Caution Be sure to clear bits 3, 6, and 11 to "0" (Also clear bit 5 of the SCR01 register to 0). Be sure to set bit
2 to "1".
Remark
m: Unit number (m = 0), n: Channel number (n = 0, 1), p: CSI number (p = 00)
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
13
12
11
10
DAP
CKP
0
EOC
mn
mn
mn
Transmission
Does not output the parity bit.
Note 2
Outputs 0 parity
.
Outputs even parity.
Outputs odd parity.
Selection of data transfer sequence in CSI and UART modes
No stop bit
Stop bit length = 1 bit
Stop bit length = 2 bits (mn = 00 only)
Setting prohibited
Setting of data length in CSI and UART modes
9-bit data length (stored in bits 0 to 8 of the SDRmn register) (settable in UART mode only)
7-bit data length (stored in bits 0 to 6 of the SDRmn register)
8-bit data length (stored in bits 0 to 7 of the SDRmn register)
CHAPTER 11 SERIAL ARRAY UNIT
After reset: 0087H
9
8
7
6
PTC
PTC
DIR
0
mn1
mn0
mn
n1
Setting of parity bit in UART mode
Receives without parity
No parity judgment
Judged as even parity.
Judges as odd parity.
Setting of stop bit in UART mode
R/W
5
4
3
2
SLCm
SLC
0
1
Note 1
mn0
Reception
1
0
DLSm
DLS
n1
mn0
321

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