Timer Input Select Register 0 (Tis0) - Renesas RL78/G1P Hardware User Manual

RL78/G1P

6.3.8 Timer input select register 0 (TIS0)

The TIS0 register is used to select the channel 1 of unit 0 timer input.
The TIS0 register can be set by an 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Address: F0074H After reset: 00H
Symbol 7
TIS0 0
TIS02
0
0
0
0
1
Other than above
Caution High-level width, low-level width of timer input is selected, will require more than 1/f
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Figure 6-16. Format of Timer Input Select register 0 (TIS0)
R/W
6 5
0 0
TIS01 TIS00
0 0 Input signal of timer input pin (TI01)
0 1
1 0
1 1
0 0 Low-speed on-chip oscillator clock (f
Setting prohibited
CHAPTER 6 TIMER ARRAY UNIT
4 3
0 0 TIS02
Selection of timer input used with channel 1
2 1
TIS01 TIS00
)
IL
MCK
0
+10 ns.
151