Renesas RL78/G1P Hardware User Manual page 234

RL78/G1P
Figure 6-69. Example of Set Contents of Registers When PWM Function (Slave Channel) Is Used
(a) Timer mode register mp (TMRmp)
15 14
TMRmp
CKSmp1 CKSmp0
1/0 0
Operation clock (f
00B: Selects CKm0 as operation clock of channel p.
10B: Selects CKm1 as operation clock of channel p.
(b) Timer output register m (TOm)
Bit p
TOm
TOmp
1/0
(c) Timer output enable register m (TOEm)
Bit p
TOEm
TOEmp
1/0
(d) Timer output level register m (TOLm)
Bit p
TOLm
TOLmp
1/0
(e) Timer output mode register m (TOMm)
Bit p
TOMm
TOMmp
1
Note TMRm5, TMRm7: Fixed to 0
TMRm1, TMRm3: SPLITmp bit
m: Unit number (m = 0), n: Master channel number (n = 0, 2)
Remark
p: Slave channel number (n = 0: p = 1, 2, 3, n = 2: p = 3)
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
13 12 11 10
Note
CCSmp STSmp2 STSmp1
M/S
0 0 0 1
Setting of MASTERmp bit (channel 2)
0: Slave channel.
Setting of SPLITmp bit (channels 1, 3)
0: 16-bit timer mode.
Count clock selection
0: Selects operation clock (f
) selection
MCK
* Make the same setting as master channel.
0: Outputs 0 from TOmp.
1: Outputs 1 from TOmp.
0: Stops the TOmp output operation by counting operation.
1: Enables the TOmp output operation by counting operation.
0: Positive logic output (active-high)
1: Negative logic output (active-low)
1: Sets the slave channel output mode.
9 8 7 6 5
STSmp0 CISmp1 CISmp0
0 0 0 0 0
Operation mode of channel p
100B: One-count mode
Selection of TImp pin input edge
00B: Sets 00B because these are not used.
Start trigger selection
100B: Selects INTTMmn of master channel.
).
MCK
CHAPTER 6 TIMER ARRAY UNIT
4 3 2 1
MDmp3 MDmp2 MDmp1
0 1 0 0
Start trigger during operation
1: Trigger input is valid.
0
MDmp0
1
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