Tomn Pin Output Setting - Renesas RL78/G1P Hardware User Manual

16-bit single-chip microcontroller

Hide thumbs Also See for RL78/G1P:

Table of Contents

6.6.2 TOmn pin output setting

The following figure shows the procedure and status transition of the TOmn output pin from initial setting to timer

operation start.

Figure 6-31. Status Transition from Timer Output Setting to Operation Start

Timer alternate-function pin

Timer output signal

<1> The operation mode of timer output is set.

 TOMmn bit (0: Master channel output mode, 1: Slave channel output mode)

 TOLmn bit (0: Positive logic output, 1: Negative logic output)

<2> The timer output signal is set to the initial status by setting timer output register m (TOm).

<3> The timer output operation is enabled by writing 1 to the TOEmn bit (writing to the TOm register is disabled).

<4> The port I/O setting is set to output (see 6.3.14 Port mode registers 1, 3 (PM1, PM3)).

<5> The timer operation is enabled (TSmn = 1).

m: Unit number (m = 0), n: Channel number (n = 0 to 3)

R01UH0895EJ0100 Rev.1.00

Nov 29, 2019

Undefined value (FFFFH after reset)

Write operation enabled period to TOmn

<1> Set TOMmn

<2> Set TOmn

CHAPTER 6 TIMER ARRAY UNIT

Write operation disabled period to TOmn

<3> Set TOEmn

<4> Set the port to

<5> Timer operation start