Renesas RL78/G1P Hardware User Manual page 63

RL78/G1P
Address Extended Special Function Register
F0010H A/D converter mode register 2
F0011H Conversion result comparison upper limit
setting register
F0012H Conversion result comparison lower limit
setting register
F0013H A/D test register
F0031H Pull-up resistor option register 1
F0033H Pull-up resistor option register 3
F0034H Pull-up resistor option register 4
F0061H Port mode control register 1
F0070H Noise filter enable register 0
F0071H Noise filter enable register 1
F0073H Input switch control register
F0074H Timer input select register 0
F0076H A/D port configuration register
F0078H Invalid memory access detection control
register
F007AH Peripheral enable register 1
F0090H Data flash control register
F00A0H High-speed on-chip oscillator trimming
register
F00A8H High-speed on-chip oscillator frequency
select register
F00F0H Peripheral enable register 0
F00F5H RAM parity error control register
F00FEH BCD adjust result register
F0100H Serial status register 00
F0101H
F0102H Serial status register 01
F0103H
F0108H Serial flag clear trigger register 00
F0109H
F010AH Serial flag clear trigger register 01
F010BH
Note The value after a reset is adjusted at shipment.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Table 3-6. Extended Special Function Register (2nd SFR) List (1/4)
(2nd SFR) Name
CHAPTER 3 CPU ARCHITECTURE
Symbol R/W
ADM2 R/W
ADUL R/W
ADLL R/W
ADTES R/W
PU1 R/W
PU3 R/W
PU4 R/W
PMC1 R/W
NFEN0 R/W
NFEN1 R/W
ISC R/W
TIS0 R/W
ADPC R/W
IAWCTL R/W
PER1 R/W
DFLCTL R/W
HIOTRM R/W
HOCODIV R/W
PER0 R/W
RPECTL R/W
BCDADJ R
SSR00L SSR00 R

SSR01L SSR01 R

SIR00L SIR00 R/W

SIR01L SIR01 R/W

Manipulable Bit Range
1-bit 8-bit 16-bit
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
 
  
 
  
 
  
 
After Reset
00H
FFH
00H
00H
00H
00H
01H
FFH
00H
00H
00H
00H
00H
00H
00H
00H
Undefined
Note
Undefined
00H
00H
Undefined
0000H
0000H
0000H
0000H
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