Renesas RL78/G1P Hardware User Manual page 481

16-bit single-chip microcontroller
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RL78/G1P
(3) Permissible baud rate range for reception
The permissible baud rate range for reception during UART (UART0) communication can be calculated by the
following expression. Make sure that the baud rate at the transmission side is within the permissible baud rate
range at the reception side.
(Maximum receivable baud rate) =
(Minimum receivable baud rate) =
Brate: Calculated baud rate value at the reception side (See 11.7.4 (1) Baud rate calculation expression.)
k:
SDRmn[15:9] + 1
Nfr:
1 data frame length [bits]
= (Start bit) + (Data length) + (Parity bit) + (Stop bit)
Remark m: Unit number (m = 0), n: Channel number (n = 1), mn = 01
Figure 11-119. Permissible Baud Rate Range for Reception (1 Data Frame Length = 11 Bits)
Data frame length
of SAU
Permissible minimum
data frame length
Permissible maximum
data frame length
As shown in Figure 11-119, the timing of latching receive data is determined by the division ratio set by bits 15 to 9
of serial data register mn (SDRmn) after the start bit is detected. If the last data (stop bit) is received before this
latch timing, the data can be correctly received.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
2  k  Nfr
2  k  Nfr  k + 2
2  k  (Nfr  1)
2  k  Nfr  k  2
Latch
timing
Start
Bit 0
Bit 1
bit
FL
Start
Bit 0
Bit 1
bit
Start
Bit 0
Bit 1
bit
CHAPTER 11 SERIAL ARRAY UNIT
 Brate
 Brate
Parity
Bit 7
1 data frame (11 × FL)
Parity
Bit 7
bit
(11 × FL) min.
Bit 7
(11 × FL) max.
Stop
bit
bit
Stop
bit
Parity
Stop
bit
bit
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