Mirror Area - Renesas RL78/G1P Hardware User Manual

RL78/G1P

3.1.2 Mirror area

The RL78/G1P mirrors the code flash area of 02000H to 03FFFH, F2000H to F3FFFH.
By reading data from F2000H to F3FFFH, an instruction that does not have the ES register as an operand can be used,
and thus the contents of the code flash can be read with the shorter code. However, the code flash area is not mirrored to
the SFR, extended SFR, RAM, and use prohibited areas.
See 3.1 Memory Space for the mirror area of each product.
The mirror area can only be read and no instruction can be fetched from this area.
The following show examples.
Example RL78/G1P (Flash memory: 16 KB, RAM: 1.5 KB)
F F F F FH
F F F 0 0 H
F F E F F H
F F E E 0 H
F F E DF H
F F 9 0 0 H
F F 8 F F H
F 4 0 0 0 H
F 3 F F F H
F 2 0 0 0 H
F 1 F F F H
F 1 8 0 0 H
F 1 7 F F H
F 0 E 0 0 H
F 0 D F F H
F 0 8 0 0 H
F 0 7 F F H
F 0 0 0 0 H
E F F F F H
0 4 0 0 0 H
0 3 F F F H
0 2 0 0 0 H
0 1 F F F H
0 0 0 0 0 H
The PMC register is described below.
R01UH0895EJ0100 Rev.1.00
Nov 29, 2019
Special-function registers (SFR)
256 bytes
General-purpose registers
32 bytes
RAM
1.5 KB
Reserved
Mirror
(same data as 02000H to 03FFFH)
Reserved
Data flash memory
Reserved
Extended special function registers
(2nd SFR)
2 KB
Reserved
Code flash memory
Code flash memory
CHAPTER 3 CPU ARCHITECTURE
For example, 03789H is
mirrored to F3789H. Data can
therefore be read by
MOV A, !3789H, instead of
MOV ES, #00H and
MOV A, ES:!3789H.
Mirror
31