Renesas RL78/G1P Hardware User Manual page 454

16-bit single-chip microcontroller

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Table of Contents

(1) Register setting

Figure 11-100. Example of Contents of Registers for UART Transmission of UART (UART0) (1/2)

(a) Serial mode register mn (SMRmn)

Operation clock (f

0: Prescaler output clock CKm0 set by the SPSm register

1: Prescaler output clock CKm1 set by the SPSm register

(b) Serial communication operation setting register mn (SCRmn)

Setting of parity bit

00B: No parity

01B: Appending 0 parity

10B: Appending Even parity

11B: Appending Odd parity

(d) Serial output level register m (SOLm) ... Sets only the bits of the target channel.

Note When UART0 performs 9-bit communication (by setting the DLS001 and DLS000 bits of the SCR00 register

to 1), bits 0 to 8 of the SDR00 register are used as the transmission data specification area.

Remarks 1. m: Unit number (m = 0), n: Channel number (n = 0), q: UART number (q = 0), mn = 00

: Setting is fixed in the UART transmission mode,

×: Bit that cannot be used in this mode (set to the initial value when not used in any mode)

0/1: Set to 0 or 1 depending on the usage of the user

R01UH0895EJ0100 Rev.1.00

Nov 29, 2019

) of channel n

Selection of data transfer sequence

0: Inputs/outputs data with MSB first

1: Inputs/outputs data with LSB first.

Baud rate setting

0: Non-reverse (normal) transmission

1: Reverse transmission

: Setting disabled (set to the initial value)

CHAPTER 11 SERIAL ARRAY UNIT

Interrupt source of channel n

0: Transfer end interrupt

1: Buffer empty interrupt

Setting of stop bit

01B: Appending 1 bit

10B: Appending 2 bits

Transmit data setting