Renesas RL78/G1P Hardware User Manual page 10

6.2.1 Timer count register mn (TCRmn) .................................................................................................. 135
6.2.2 Timer data register mn (TDRmn) .................................................................................................... 136
6.3 Registers Controlling Timer Array Unit .................................................................................... 137
6.3.1 Peripheral enable register 0 (PER0) ............................................................................................... 138
6.3.2 Timer clock select register m (TPSm) ............................................................................................ 139
6.3.3 Timer mode register mn (TMRmn) ................................................................................................. 142
6.3.4 Timer status register mn (TSRmn) ................................................................................................. 147
6.3.5 Timer channel enable status register m (TEm) ............................................................................... 148
6.3.6 Timer channel start register m (TSm) ............................................................................................. 149
6.3.7 Timer channel stop register m (TTm) ............................................................................................. 150
6.3.8 Timer input select register 0 (TIS0) ................................................................................................ 151
6.3.9 Timer output enable register m (TOEm) ......................................................................................... 152
6.3.10 Timer output register m (TOm) ..................................................................................................... 153
6.3.11 Timer output level register m (TOLm) ........................................................................................... 154
6.3.12 Timer output mode register m (TOMm) ........................................................................................ 155
6.3.13 Noise filter enable register 1 (NFEN1) .......................................................................................... 156
6.3.14 Port mode registers 1, 3 ( PM1, PM3) .......................................................................................... 157
6.4 Basic Rules of Timer Array Unit ............................................................................................... 158
6.4.1 Basic rules of simultaneous channel operation function ................................................................. 158
6.4.2 Basic rules of 8-bit timer operation function (channels 1 and 3 only) ............................................. 160
6.5 Operation of Counter ................................................................................................................. 161
6.5.1 Count clock (f
6.5.2 Start timing of counter .................................................................................................................... 163
6.5.3 Operation of counter ....................................................................................................................... 164
6.6 Channel Output (TOmn pin) Control ........................................................................................ 169
6.6.1 TOmn pin output circuit configuration ............................................................................................. 169
6.6.2 TOmn pin output setting ................................................................................................................. 170
6.6.3 Cautions on channel output operation ............................................................................................ 171
6.6.4 Collective manipulation of TOmn bit ............................................................................................... 176
6.6.5 Timer interrupt and TOmn pin output at operation start .................................................................. 177
6.7 Timer Input (TImn) Control ........................................................................................................ 178
6.7.1 TImn input circuit configuration ....................................................................................................... 178
6.7.2 Noise filter ...................................................................................................................................... 178
6.7.3 Cautions on channel input operation .............................................................................................. 179
6.8 Independent Channel Operation Function of Timer Array Unit ............................................. 180
6.8.1 Operation as interval timer/square wave output ............................................................................. 180
6.8.2 Operation as external event counter .............................................................................................. 186
6.8.3 Operation as input pulse interval measurement ............................................................................. 191
6.8.4 Operation as input signal high-/low-level width measurement ........................................................ 195
6.8.5 Operation as delay counter ............................................................................................................ 199
6.9 Simultaneous Channel Operation Function of Timer Array Unit .......................................... 204
) .......................................................................................................................... 161
TCLK
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