Bus Timing - Renesas H8S/2633 Series Hardware Manual

25.3.3

Bus Timing

Table 25-7 lists the bus timing.
Table 25-7 Bus Timing
Condition A: V = PLLV
CC
V = 3.6 V to AV
ref
to +75°C (regular specifications), T
Condition B: V = PLLV
CC
V = 4.5 V to AV
ref
+75°C (regular specifications), T
Item
Address delay time
Address setup time
Address hold time
CS delay time 1
CS delay time 2
AS delay time
RD delay time 1
RD delay time 2
Read data setup
time
Read data hold
time
Read data access
time1
Read data access
time2
Read data access
time3
Read data access
time 4
= 3.0 V to 3.6 V, PV
CC
* 2
, V = AV
CC SS
= 3.0 V to 3.6 V, PV
CC
, V = AV
CC SS
Condition A
Symbol Min Max
t — 30
AD
0.5 ×
t —
AS
t – 30
cyc
0.5 ×
t —
AH
t – 20
cyc
t — 30
CSD1
t — 30
CSD2
t — 30
ASD
t — 30
RSD1
t — 30
RSD2
t 30 —
RDS
t 0 —
RDH
1.0 ×
t —
ACC1
t
1.5 ×
t —
ACC2
t
2.0 ×
t —
ACC3
t
2.5 ×
t —
ACC4
t
= 3.0 V to 5.5 V, AV
CC
= PLLV = 0 V, ø = 2 to 16 MHz, T
SS SS
= –40°C to +85°C (wide-range specifications)
a
= 4.5 V to 5.5 V, AV
CC
= PLLV = 0 V, ø = 2 to 25 MHz, T
SS SS
= –40°C to +85°C (wide-range specifications)
a
Condition B
Min
—
0.5 ×
t – 15
cyc
0.5 ×
t – 8
cyc
—
—
—
—
—
15
0
—
– 35
cyc
—
– 35
cyc
—
– 35
cyc
—
– 35
cyc
= 3.6 V to 5.5 V *
CC
= 4.5 V to 5.5 V,
CC
a
Max Unit Test Conditions
20 ns Figure 25-6 to
— ns figure 25-11
— ns
20 ns
18 ns
18 ns
18 ns
18 ns
— ns
— ns
1.0 ×
ns
t – 25
cyc
1.5 ×
ns
t – 25
cyc
2.0 ×
ns
t – 25
cyc
2.5 ×
ns
t – 25
cyc
1
,
= –20°C
a
= –20°C to
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