Figure 20.4 I C Bus Interface Input/Output Timing; Figure 20.5 Sck3 Input Clock Timing - Renesas H8 Series Hardware Manual

V
IH
SDA
V
IL
t
BUF
t
STAH
SCL
P* S*
t
t
Sf
Note: * S, P, and Sr represent the following:
S: Start condition
P: Stop comdition
Sr: Retransmission start condition
Figure 20.4 I
SCK3
t
SCLH
SCLL
t
Sr
t
SCL
t
SDAH
2
C Bus Interface Input/Output Timing
t
SCKW

Figure 20.5 SCK3 Input Clock Timing

Section 20 Electrical Characteristics
t
SP
t
STAS
Sr*
t
SDAS
t
scyc
Rev. 3.00 Sep. 14, 2006 Page 347 of 408
t
STOS
P*
REJ09B0105-0300