1. Reception
φ
KCLK/KD *
2. Transmission (a)
φ
KCLK/KD *
Transmission (b)
KCLK/KD *
φ shown here is the clock scaled by 1/N when the operating mode is active
Note:
medium-speed mode.
* KCLK:
KD:
SDA0,
SDA1,
ExSDAA,
t
BUF
ExSDAB
SCL0,
SCL1,
P*
S*
ExSCLA,
ExSCLB
t
Sf
Note:*
S, P, and Sr indicate the following conditions.
S:
Start condition
P:
Stop condition
Sr:
Retransmission start condition
Figure 22.22 I
t
t
KBIS
T
1
PS2AC to PS2CC
PS2AD to PS2CD
Figure 22.21 Keyboard Buffer Controller Timing
V
IH
V
IL
t
t
SCLH
STAH
t
SCLL
t
Sr
t
SCL
2
C Bus Interface Input/Output Timing
KBIH
T
2
t
KBF
Sr*
t
SDAH
t
KBOD
t
SP
t
STAS
t
SDAS
Rev. 1.00, 05/04, page 535 of 544
t
STOS
P*