Operation Timing; Figure 20.1 System Clock Input Timing; Figure 20.2 Res Low Width Timing; Figure 20.3 Input Timing - Renesas H8 Series Hardware Manual

20.3

Operation Timing

OSC1
t
V
CC
OSC1
RES
NMI
IRQ0 to IRQ3
WKP0 to WKP5
ADTRG
FTCI
FTIOA to FTIOD
TMCIV, TMRIV
TRGV
t
OSC
V
IH
V
IL
t
CPH
CPr

Figure 20.1 System Clock Input Timing

× 0.7
V
CC
t
REL
V
IL

Figure 20.2 RES Low Width Timing

V
IH
V
IL

Figure 20.3 Input Timing

t
CPL
t
CPf
V
IL
t t
IL IH
Rev. 1.00 Aug. 28, 2006 Page 335 of 400
Section 20 Electrical Characteristics
t
REL
REJ09B0268-0100