Smart Card Mode Register (Scmr) - Renesas H8S/2633 Series Hardware Manual

16.2.9

Smart Card Mode Register (SCMR)

7
Bit :
—
Initial value : 1
R/W : —
SCMR selects LSB-first or MSB-first by means of bit SDIR. Except in the case of asynchronous
mode 7-bit data, LSB-first or MSB-first can be selected regardless of the serial communication
mode. The descriptions in this chapter refer to LSB-first transfer.
For details of the other bits in SCMR, see section 17.2.1, Smart Card Mode Register (SCMR).
SCMR is initialized to H'F2 by a reset and in standby mode.
Bits 7 to 4—Reserved: These bits are always read as 1 and cannot be modified.
Bit 3—Smart Card Data Transfer Direction (SDIR): Selects the serial/parallel conversion
format.
This bit is valid when 8-bit data is used as the transmit/receive format.
Bit 3
SDIR Description
0 TDR contents are transmitted LSB-first
Receive data is stored in RDR LSB-first
1 TDR contents are transmitted MSB-first
Receive data is stored in RDR MSB-first
Bit 2—Smart Card Data Invert (SINV): Specifies inversion of the data logic level. The SINV
bit does not affect the logic level of the parity bit(s): parity bit inversion requires inversion of the
O/E bit in SMR.
Bit 2
SINV Description
0 TDR contents are transmitted without modification
Receive data is stored in RDR without modification
1 TDR contents are inverted before being transmitted
Receive data is stored in RDR in inverted form
6 5 4
— — —
1 1 1
— — —
3 2
SDIR SINV
0 0
R/W R/W
0
1
— SMIF
1 0
— R/W
(Initial value)
(Initial value)
719