Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1716

Sharc+ processor
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Functional Description
PCIe software
Software that configures and controls the whole PCIe system.
PIPE
Standard interface between the PCIe PHY and the core
TLP
Transaction Layer Packet
USP
Upstream Port
VC
Virtual Channel
VMI
Vendor Message Interface
Top-level Block Diagram and Description
The ADI implementation of the PCIe interface is shown in the PCIe Interface Block Diagram below, and comprises
the modules described in the following section.
29–12
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference

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