Analog Devices ADSP-SC58 Series Hardware Reference Manual page 1707

• PCI Express link power management
• PCI Express advanced error reporting
• PCI Express messages for both transmit and receive
• Filtering for posted, non-posted, and completion traffic
• Configurable BAR filtering, I/O filtering, configuration filtering, and completion lookup/timeout
• Access to configuration space registers and external application memory-mapped registers through local bus
controller
• Legacy interrupts reception (RC) and generation (EP)
• MSI reception (RC) and generation (EP)
• Tx-to-Rx PIPE loopback
• IEEE 1149.6 (JTAG) boundary scan
Functional Description
The following sections provide information on the function of the PCIe.
ADSP-SC58x PCIE Register List
The following table lists the registers used by the PCIe interface.
Table 29-1: ADSP-SC58x PCIE Register List
Name
PCIE_ACK_ASPMCTL_[n]
PCIE_ACK_TMR_[n]
PCIE_ADVERR_CAPBCTL_[n]
PCIE_ADVERR_EXTCAPB_[n]
PCIE_APP_CORERR_MSG
PCIE_APP_CTL
PCIE_APP_DIAGCTL
PCIE_APP_DIAGSTAT
PCIE_APP_FERR_MSG
PCIE_APP_INTSTAT
PCIE_APP_NFERR_MSG
PCIE_APP_PMACK_MSG
PCIE_APP_PMEVT_MSG
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description
Acknowledge Frequency and L0-L1 ASPM Control Register
Acknowledge Latency Timer and Replay Timer Register
Advanced Error Capabilities and Control Register
Advanced Error Reporting Extended Capability Header Register
Correctable Error Message Requester ID Register
Application Control Register
Diagnostic Control Register
Diagnostic Status Register
Fatal Error Message Requester ID Register
Application Interrupts Status Register
Non Fatal Error Message Requester ID Register
Power Management Acknowledge Message Requester ID Register
Power Management Event Message Requester ID Register
Functional Description
29–3