Timer V Application Examples; Pulse Output With Arbitrary Duty Cycle; Figure 11.8 Clear Timing By Tmriv Input; Figure 11.9 Pulse Output Example - Renesas H8 Series Hardware Manual

ø
TMRIV(External
counter reset
input pin )
TCNTV reset
signal
TCNTV
11.5

Timer V Application Examples

11.5.1

Pulse Output with Arbitrary Duty Cycle

Figure 11.9 shows an example of output of pulses with an arbitrary duty cycle.
1. Set bits CCLR1 and CCLR0 in TCRV0 so that TCNTV will be cleared by compare match with
TCORA.
2. Set bits OS3 to OS0 in TCSRV so that the output will go to 1 at compare match with TCORA
and to 0 at compare match with TCORB.
3. Set bits CKS2 to CKS0 in TCRV0 and bit ICKS0 in TCRV1 to select the desired clock source.
4. With these settings, a waveform is output without further software intervention, with a period
determined by TCORA and a pulse width determined by TCORB.
TCNTV value
H'FF
TCORA
TCORB
H'00
TMOV
N – 1

Figure 11.8 Clear Timing by TMRIV Input

Figure 11.9 Pulse Output Example

N H'00
Counter cleared
Rev. 1.00 Aug. 28, 2006 Page 159 of 400
Section 11 Timer V
Time
REJ09B0268-0100