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Non-Overlapping Tpc Output - Renesas F-ZTAT H8 Series Hardware Manual

16-bit single-chip microcomputer
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11.3.4

Non-Overlapping TPC Output

Sample Setup Procedure for Non-Overlapping TPC Output: Figure 11.6 shows a sample
procedure for setting up non-overlapping TPC output.
Select GR functions
ITU setup
Select counting operation
Select interrupt requests
Set initial output data
Set up TPC output
Enable TPC transfer
Port and
TPC setup
Select TPC transfer trigger
Select non-overlapping groups
Set next TPC output data
ITU setup
Compare match A?
Set next TPC output data
Figure 11.6 Setup Procedure for Non-Overlapping TPC Output (Example)
Non-overlapping
TPC output
Set GR values
Start counter
Yes
Section 11 Programmable Timing Pattern Controller
1
1.
Set TIOR to make GRA and GRB output
compare registers (with output inhibited).
2.
Set the TPC output trigger period in GRB
2
and the non-overlap margin in GRA.
3.
Select the counter clock source with bits
3
TPSC2 to TPSC0 in TCR. Select the counter
clear source with bits CCLR1 and CCLR0.
4
4.
Enable the IMFA interrupt in TIER.
The DMAC can also be set up to transfer
data to the next data register.
5
5.
Set the initial output values in the DR bits
of the input/output port pins to be used for
6
TPC output.
6.
Set the DDR bits of the input/output port pins
to be used for TPC output to 1.
7
7.
Set the NDER bits of the pins to be used for
TPC output to 1.
8
8.
In TPCR, select the ITU compare match
event to be used as the TPC output trigger.
9
9.
In TPMR, select the groups that will operate
in non-overlap mode.
10.
Set the next TPC output values in the NDR
10
bits.
11.
Set the STR bit to 1 in TSTR to start the timer
counter.
11
12.
At each IMFA interrupt, write the next output
value in the NDR bits.
No
12
Rev. 7.00 Sep 21, 2005 page 431 of 878
REJ09B0259-0700

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