Section 18 Multi-Function Timer Pulse Unit (MTU)
Table 18.5 TPSC0 to TPSC2 (Channel 0)
Bit 2
Channel
TPSC2
0
0
1
Table 18.6 TPSC0 to TPSC2 (Channel 1)
Bit 2
Channel
TPSC2
1
0
1
Note: This setting is ignored when channel 1 is in phase counting mode.
Rev. 4.00 Sep. 14, 2005 Page 526 of 982
REJ09B0023-0400
Bit 1
Bit 0
TPSC1
TPSC0
0
0
1
1
0
1
0
0
1
1
0
1
Bit 1
Bit 0
TPSC1
TPSC0
0
0
1
1
0
1
0
0
1
1
0
1
Description
Internal clock: counts on Pφ/1
Internal clock: counts on Pφ/4
Internal clock: counts on Pφ/16
Internal clock: counts on Pφ/64
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
External clock: counts on TCLKC pin input
External clock: counts on TCLKD pin input
Description
Internal clock: counts on Pφ/1
Internal clock: counts on Pφ/4
Internal clock: counts on Pφ/16
Internal clock: counts on Pφ/64
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
Internal clock: counts on Pφ/256
Counts on TCNT_2 overflow/underflow