Normal Mode; Figure 8.5 Memory Mapping In Normal Mode; Table 8.2 Register Information In Normal Mode - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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8.5.1

Normal Mode

In normal mode, one operation transfers one byte or one word of data.
Table 8.2 lists the register information in normal mode.
From 1 to 65,536 transfers can be specified. Once the specified number of transfers have been
completed, a CPU interrupt can be requested.
Table 8.2
Register Information in Normal Mode
Name
DTC source address register
DTC destination address register
DTC transfer count register A
DTC transfer count register B
SAR
Abbreviation
SAR
DAR
CRA
CRB

Figure 8.5 Memory Mapping in Normal Mode

Section 8 Data Transfer Controller (DTC)
Function
Designates source address
Designates destination address
Designates transfer count
Not used
Transfer
Rev. 6.00 Mar 15, 2006 page 115 of 570
DAR
REJ09B0211-0600

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