Da16200 Fccsp, Normal Tx Power Mode, 1.8 V Flash Memory; Figure 21: Application Schematic - Fccsp, 1.8 V Flash, Normal Tx Power Mode - Renesas DA16200 H/W User Manual

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UM-WI-006
DA16200 H/W Design Guide
3.3

DA16200 fcCSP, Normal TX Power Mode, 1.8 V Flash Memory

DA16200 package type: 72-Pin fcCSP
Operating VDD of flash memory: 1.8 V
DA16200 Tx output power mode: Normal Tx power mode
Note: Remove R3 and C12 when MCU controls RTC_PWR_KEY
C9
VDD_DIO1
( 1.8V ~ 3.3V)
GPIOA3
GPIOA5
GPIOA6
GPIOA7
GPIOA4
GPIOA10
GPIOA8
GPIOA11
GPIOA9
RTC_WAKE_UP2
R5
L1
C8
VBAT
Figure 21: Application Schematic – fcCSP, 1.8 V Flash, Normal Tx Power Mode
VDD_FDIO can be connected to the power supply of the external flash memory (1.8 V) and it can
control the flash VDD in sleep mode. 3.3 V flash memory also can be used, and an additional
load switch is needed in this application
VDD_DIO1/2 should be same level with I/O voltage of external IC such as MCU
Remove R3 and C12 when external MCU control 'RTC_PWR_KEY'
User Manual
CFR0012
C11
C10
A5
A1
A3
RTC_PWR_
GND
GPIOA0
KEY
B2
B4
B6
GPIOA2
RTC_XI
GND
C1
C3
C5
VDD_DI
GPIOA1
RTC_XO
O1
D6
D2
D4
RTC_WAKE
GPIOA5
GPIOA3
_UP
E1
E3
E5
GPIOA7
GPIOA6
GND
F2
F4
F6
GPIOA10
GPIOA4
GND
G1
G3
G5
GPIOA11
GPIOA8
GND
H6
H2
H4
RTC_WAKE
GPIOA9
GND
_UP2
J3
J5
J1
DCDC_FB
GND
F_CSN
K2
K4
K6
GND
F_CLK
F_IO3
L3
L1
L5
VDD_DI
DCDC_LX
GND
G
M4
M6
M2
VDD_FDI
VBAT
GND
O
C6
C5
C7
R2
Revision 1.5
34 of 44
RF1
C17
L3
L2
C15
C18
C19
R4
Optional (Band=pass filter)
C13
A7
A9
A11
VDD_DA
GND
ANT
/PA
B8
B10
B12
VDD_DA
GND
GND
/PA
C7
C9
C11
GND
GND
GND
D12
D10
D8
VDD_AN
GND
GND
E7
E9
E11
GND
RBIAS
RTC_GPO
F8
F10
F12
GND
GND
GND
G7
G9
G11
GND
GND
RF_XI
H8
H10
H12
GND
GND
RF_XO
J7
J9
J11
F_IO2
TCLK
TMS
K12
K8
K10
GPIOC8
GPIOC7
F_IO0
L9
L7
L11
UART_T
F_IO1
GPIOC6
XD
M10
M12
M8
UART_R
DIO2
GND
XD
C4
© 2022 Renesas Electronics
NDA Confidential
C1
A
R1
C2
C3
TMS
TCLK
GPIOC7
GPIOC8
GPIOC6
11-Apr-2022

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