Section 17 Flash Memory (0.18-Μm F-Ztat Version); Features - Renesas H8SX/1520 Series Hardware Manual

32-bit cisc microcomputer
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Section 17 Flash Memory (0.18-µm F-ZTAT Version)
The flash memory has the following features. Figure 17.1 is a block diagram of the flash memory.
17.1

Features

• Size
Product Classification
H8SX/1527
H8SX/1525
• Two memory MATs
The start addresses of two memory spaces (memory MATs) are allocated to the same address.
The mode setting in the initiation determines which memory MAT is initiated first. The
memory MATs can be switched by using the bank-switching method after initiation.
 User MAT initiated at a power-on reset in user mode: 256 kbytes
 User boot MAT is initiated at a power-on reset in user boot mode: 10 kbytes
• Programming/erasing interface by the download of on-chip program
This LSI has a programming/erasing program. After downloading this program to the on-chip
RAM, programming/erasing can be performed by setting the parameters.
• Programming/erasing time
Programming time: 3 ms (typ) for 128-byte simultaneous programming, 23.4 µs per byte
Erasing time: 1000 ms (typ) per 1 block (64 kbytes)
• Number of programming
The number of programming can be up to 100 times at the minimum. (1 to 100 times are
guaranteed.)
• Three on-board programming modes
Boot mode: Using the on-chip SCI_4, the user MAT and user boot MAT can be
programmed/erased. In boot mode, the bit rate between the host and this LSI can be adjusted
automatically.
User program mode: Using a desired interface, the user MAT can be programmed/erased.
User boot mode: Using a desired interface, the user boot program can be made and the user
MAT can be programmed/erased.
• Off-board programming mode
Programmer mode: Using a PROM programmer, the user MAT and user boot MAT can be
programmed/erased.
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ROM Size
R5F61527
256 kbytes
R5F61525
Section 17 Flash Memory (0.18-(m F-ZTAT Version)
ROM Address
H'000000 to H'03FFFF (modes 1 to 3)
Rev. 3.00 Mar. 14, 2006 Page 569 of 804
REJ09B0104-0300

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