Motorola MPC860 PowerQUICC User Manual page 617

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Figure 21-25. ISDN Terminal Adaptor Using IDL
The MPC860 can identify and support each IDL channel or it can output strobe lines for
interfacing with devices that do not support the IDL bus. The IDL signals for each transmit
and receive channel are as follows:
¥ L1RCLKxÑIDL clock. Input to the MPC860.
¥ L1RSYNCxÑIDL sync signal. Input to the MPC860. This signal indicates that the
clock periods following the pulse designate the IDL frame.
¥ L1RXDxÑIDL receive data. Input to the MPC860. Valid only for bits supported by
the IDL; ignored for other signals that may be present.
¥ L1TXDxÑIDL transmit data. Output from the MPC860. Valid only for bits
supported by the IDL; otherwise, three-stated.
¥ L1RQxÑIDL request permission to transmit on the D channel. Output from the
MPC860 on L1RQx.
¥ L1GRxÑIDL grant permission to transmit on the D channel. Input to the MPC860
on L1TSYNCx.
The basic rate IDL bus has three channels:
¥ B1 is a 64-Kbps bearer channel
¥ B2 is a 64-Kbps bearer channel
¥ D is a 16-Kbps signaling channel
There are two deÞnitions of the IDL bus frame structureÑ8- and 10-bit. The only
difference between them is the channel order within the frame. See Figure 21-26.
MOTOROLA
System Bus (ROM and RAM)
SMC1
SPI
MPC860
IDL
SMC2
(Data)
SCC2
TSA
B2+D
SCC3
SCC1
Ethernet
MC68160
EEST
Chapter 21. Serial Interface
Part V. The Communications Processor Module
MC145554
PCM
CODEC/Filter
B1
Monocircuit
IDL
(Control)
MC145474
S/T
B1+B2+D
Transceiver
LAN
POTS
Four Wire
21-29