Motorola MPC860 PowerQUICC User Manual page 382

Part IV. Hardware Interface
14.4.7.2 Address Bus
The 32-bit address bus, A[0Ð31], is byte addressable, so each address can address one or
more bytes. A0 is the msb. The address and its attributes are driven on the bus with TS; they
remain valid until the bus master receives a transfer acknowledge from the slave. To
distinguish an individual byte, the slave device must observe the TSIZ signals.
14.4.7.3 Transfer Attributes
The transfer attributes signal group consists of RD/WR, BURST, TSIZ[0Ð1], AT[0Ð3],
STS, and BDIP. These signals (with the exception of the BDIP) are available at the same
time as the address bus.
14.4.7.3.1 Read/Write
RD/WR high indicates a read access and low indicates a write access. Driven at the
beginning of a bus cycle, RD/WR is valid at the rising edge of the clock in which TS is
asserted. RD/WR changes levels only when a write cycle is preceded by a read cycle or vice
versa. It may remain low for consecutive write cycles.
14.4.7.3.2 Burst Indicator
BURST is driven by the bus master at the beginning of the bus cycle (along with the
address) to indicate that the transfer is a burst transfer.
14.4.7.3.3 Transfer Size
TSIZ[0Ð1] indicates the size of the requested data transfer. The TSIZ signals may be used
with BURST and A[30Ð31] to determine which data byte lanes are used in the transfer. For
nonburst transfers, TSIZ[0Ð1] speciÞes the number of bytes starting from the byte location
addressed by A[30Ð31]. In burst transfers, the value of TSIZ[0Ð1] is always 00.
14.4.7.3.4 Address Types
The address type signals (AT[0Ð3]), PTR and RSV, are outputs that indicate one of 16
address types to which the address applies. These types are designated as either a
normal/alternate master cycle, user/supervisor (problem/privilege), and instruction/data
types. The address type signals are valid at the rising edge of the clock in which the special
transfer start (STS) signal is asserted.
14-30
Table 14-4. BURST/TSIZ Encoding
BURST TSIZ[0Ð1]
N 01
N 10
N 11
N 00
A 00
MPC860 PowerQUICC UserÕs Manual
Transfer Size
Byte
Half word
x
Word
Burst (16 bytes)
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