Motorola MPC860 PowerQUICC User Manual page 903

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Chapter 35
CPM Interrupt Controller
350
350
The CPM interrupt controller (CPIC) accepts and prioritizes the internal and external
interrupt requests from the CPM blocks and passes them to the system interface unit (SIU).
The CPIC also provides a vector during the core interrupt acknowledge cycle.
35.1 Features
The following is a list of the CPICÕs main features:
¥ Twenty-nine interrupt sourcesÑ17 internal and 12 external (through port C)
¥ Sources can be assigned to a programmable interrupt level
¥ Programmable priority between SCCs
¥ Two priority schemes for SCCs
¥ Programmable highest priority request
¥ Fully-nested interrupt environment
¥ Individual interrupt sources can be masked in the CPM interrupt mask register
(CIMR).
¥ Unique vector number for each interrupt source
The CPIC manages interrupts from internal CPM sources. These sources are primarily
generated by controllers, such as the SCCs, SMCs, SPI, and I
general-purpose timers and port C parallel I/O signals described in Section 34.4, ÒPort C.Ó
More than one of these sources may generate interrupts at the same time; therefore, the
CIMR register is provided for masking individual sources. Additional masking is provided
for speciÞc interrupt events within each controller that reports interrupts through the CPIC.
These mask registers are described in the chapters that describe individual controllers. All
CPIC-managed interrupt sources are prioritized and bits are set in the CPM interrupt
pending register (CIPR).
Figure 35-1 shows the MPC860 interrupt structure. The left of the Þgure shows individual
interrupt sources managed by the CPIC, which signals CPIC-managed interrupts to the
SIU, shown in the middle of Figure 35-1. All interrupts signaled by the CPIC are presented
to the SIU at a single programmable priority level (0Ð7). In turn, the SIU controls which
PowerPC architecture-deÞned external interrupt exception condition is reported to the
PowerPC core.
MOTOROLA
Chapter 35. CPM Interrupt Controller
2
C but also include the 12
35-1

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