Motorola MPC860 PowerQUICC User Manual page 800

Part V. The Communications Processor Module
SMCLK
16x
SMTXD
Start
Bit
NOTE:
1. Clock is not to scale.
30.3.1 SMC UART Features
The following list summarizes the main features of the SMC in UART mode:
¥ Flexible message-oriented data structure
¥ Programmable data length (5Ð14 bits)
¥ Programmable 1 or 2 stop bits
¥ Even/odd/no parity generation and checking
¥ Frame error, break, and IDLE detection
¥ Transmit preamble and break sequences
¥ Received break character length indication
¥ Continuous receive and transmit modes
30.3.2 SMC UART-SpeciÞc Parameter RAM
For UART mode, the protocol-speciÞc area of the SMC parameter RAM is mapped as in
Table 30-4.
Table 30-4. SMC UART-Specific Parameter RAM Memory Map
1
Offset Name Width
0x28 MAX_IDL Hword Maximum idle characters. When a character is received on the line, the SMC starts
0x2A IDLC Hword Temporary idle counter. Down-counter in which the CP stores the current idle counter
0x2C BRKLN Hword Last received break length. Stores the length of the last break character received and is
30-10
5 to 14 Data Bits with the
Least SigniÞcant Bit First
Figure 30-5. SMC UART Frame Format
counting idle characters received. If MAX_IDL idle characters arrive before the next
character, an idle time-out occurs and the buffer closes, which sends an interrupt
request to the core to receive data from the buffer. An idle character is deÞned as a full
character length of logic high. MAX_IDL can be used to demarcate frames in UART
mode. Clearing MAX_IDL disables this function so idle never causes the buffer to close,
regardless of how many idle characters are received. The length of an idle character is
calculated as follows: 1 + data length (5 to 14) + 1 (if parity bit is used) + number of stop
bits (1 or 2). For example, for 8 data bits, no parity, and 1 stop bit, character length is 10
bits.
value in the MAX_IDL time-out process.
the bit length of that character. For example, if the receive pin is low for 257 bit times,
BRKLN is 0x0101 and is accurate to within one character unit of bits. For 8 data bits, no
parity, 1 stop bit, and 1 start bit, BRKLN is accurate to within 10 bits.
MPC860 PowerQUICC UserÕs Manual
Parity
Bit
(Optional)
Description
1 or 2
Stop Bits
MOTOROLA