Motorola MPC860 PowerQUICC User Manual page 474

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Part IV. Hardware Interface
¥ If G4T4/DLT3 functions as G4T4, data is latched on the rising edge of the external
bus clock, as is normal in MPC860 bus operation.
Figure 16-44 shows data sampling that is controlled by the UPM.
Latch
To Internal
Latch
Multiplexer
Data Bus
Data Bus
DLT3 and GPLx4DIS
GCLK2_50
Figure 16-44. UPM Read Access Data Sampling
16.6.4.9 Disable Timer Mechanism (TODT)
The disable timer associated with each UPM allows a minimum time to be guaranteed
between two successive accesses to the same memory bank. This feature is critical when
DRAM requires a RAS precharge time. The TODT bit in the RAM word turns the timer on
to prevent another UPM access to the same bank until the timer expires.The disable timer
period is determined in MxMR[DSx]. The disable timer does not affect memory accesses
to different banks.
TODT is usually set in the RAM word in which LAST = 1. However, it can be set in a
previous RAM word, if, for example, one pattern requires n clocks of RAS precharge
enforced outside of itself, while another pattern requires only n - 1.
16.6.4.10 The Last Word (LAST)
When the LAST bit is read in a RAM word, the current UPM pattern terminates and the
highest priority pending UPM request (if any) is serviced immediately in the external
memory transactions. If the disable timer is activated and the next access is top the same
bank, the execution of the next UPM pattern is held off for the number of clock cycles
speciÞed in MxMR[DSx].
16.6.4.11 The Wait Mechanism (WAEN)
The WAEN bit can be used to enable the UPM wait mechanism in selected UPM RAM
words. The wait mechanism works differently for synchronous and asynchronous masters.
16.6.4.11.1 Internal and External Synchronous Masters
If the UPM reads a RAM word with the WAEN bit set, the external UPWAIT signal is
sampled and synchronized by the memory controller and the current request is frozen. If
the WAEN bit is set and UPWAIT was sampled high on the previous falling edge of
GCLK2_50, the logical value of the external signals are frozen to the value deÞned at the
16-48
MPC860 PowerQUICC UserÕs Manual
MOTOROLA

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