Motorola MPC860 PowerQUICC User Manual page 416

Part IV. Hardware Interface
SCCR[DFNH]. For more information about SCCR[DFNH], refer to Section 15.3.1.1, ÒThe
Internal General System Clocks (GCLK1C, GCLK2C, GCLK1, GCLK2). Note also that
PLPRCR[TMIST] should be cleared before entering doze high mode; for more
information, see Section 15.5.8, ÒTMIST: Facilitating Nesting of SIU Timer Interrupts.
The MPC860 will leave doze high mode and enter normal high mode when a pending
interrupt from the interrupt controller occurs. These interrupts include all internal and
external interrupt sources, if enabled. This action requires that SCCR[PRQEN] be set;
otherwise, the MPC860 will not wake up. When the MPC860 enters normal high mode,
PLPRCR[LPM] is cleared.
Upon resumption of processing in normal high or low mode, the MPC860 will jump to the
external interrupt vector to process the interrupt source. When the core returns from the
exception handler via rÞ, it will resume processing from the instruction following that
which initiated entry into doze mode.The one exception to this is the decrementer, a
wake-up interrupt from the decrementer will never cause a jump to the interrupt handler;
instead processing will always resume from the instruction following that which initiated
entry into low-power mode.
15.5.4 Doze Low Mode
Doze low mode is similar to Doze high mode, except that additionally the system clock
frequency has been reduced. In doze low mode, the GCLKx frequency is determined by
SCCR[DFNL]. For more information about SCCR[DFNL], refer to Section 15.3.1.1, ÒThe
Internal General System Clocks (GCLK1C, GCLK2C, GCLK1, GCLK2).
Doze low mode is selected if PLPRCR[CSRC]=1, MSR[POW]=1, and
PLPRCR[LPM]=01. Note also that PLPRCR[TMIST] should be cleared before entering
doze low mode; for more information, see Section 15.5.8, ÒTMIST: Facilitating Nesting of
SIU Timer Interrupts.
The MPC860 has the option to temporarily leave doze low mode and enter doze high mode
when CPM activity occurs. This option is enabled in SCCR[CRQEN]. When the CP
Þnishes servicing the peripheral request, the MPC860 will automatically reenter doze low
mode.
The MPC860 will leave doze low mode and enter normal high mode when a pending
interrupt from the interrupt controller occurs. These interrupts include all internal and
external interrupt sources, if enabled. This action requires that SCCR[PRQEN] be set;
otherwise, the MPC860 will not wake up. When the MPC860enters normal high or normal
low mode, PLPRCR[LPM] is cleared.
When the MPC860 leaves doze low mode, it will enter normal high mode if
SCCR[PRQEN] is set; otherwise it will enter normal low mode.
Upon resumption of processing in normal high or low mode, the MPC860 will jump to the
external interrupt vector to process the interrupt source. When the core returns from the
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